This invention relates generally to CMOS chopper stabilized operational amplifiers, and more particularly the invention relates to such an operational amplifier which utilizes two pairs of differential amplifiers as input stages.
The chopper amplifier achieves high DC stability by converting the DC input into an AC signal. An AC gain stage amplifies this signal. After amplification it is converted back to DC and presented as the amplifier's output. The AC amplifier's input is alternately switched between the signal input and the feedback divider network. The AC amplifier's output amplitude represents the difference between the feedback signal and the circuit's input. This output is converted back to DC by a phase-sensitive demodulator composed of a second switch, synchronously driven with the input switch. The output integrator stage smoothes the switch output to DC and presents the final output. Drifts in the output integrator stage are of little consequence because they are preceded by the AC gain stage. The DC drifts in the AC stage are also irrelevant because they are isolated from the rest of the amplifier by the coupling capacitors. Overall DC gain is extremely high, being the product of the gains of the AC stage and the DC gain of the integrator.
The classic chopper-stabilized amplifier solves the chopper amplifier's low bandwidth problem. It uses a parallel path approach to provide wider bandwidth while maintaining good DC characteristics. The stabilizing amplifier, a chopper type, biases the fast amplifier's positive terminal to force the summing point to zero. Fast signals directly drive the AC amplifier, while slow ones are handled by the stabilizing chopper amplifier. The low-frequency cut-off of the fast amplifier must coincide with the high-frequency roll-off of the stabilizing amplifier to achieve smooth overall gain-frequency characteristics.
The conventional bipolar operational amplifier requires component matching to insure low input errors, while the conventional CMOS chopper stabilized operational amplifier has circuitry to compensate component offset. In compensating the component offset, sampled data techniques are employed to periodically short the two inputs and close a loop around an amplifier to force the input error to zero. The error correction voltage is capacitively stored and provides a bias voltage to an input stage. Both the main amplifier and the nulling amplifier have offset null capability. The main amplifier is continuously connected from the input to the output, while the nulling amplifier under the control of the chopping frequency oscillator and clock circuit alternately nulls itself and the main amplifier.
Redfern, U.S. Pat. No. 4,622,521 discloses a chopper-stabilized operational amplifier in which improved operation of the nulling amplifier is achieved by providing transistors in parallel with load transistors of a differential amplifier. An offset correction voltage is applied to one of the transistors and thereby modifies the load.